[ref. c34341104] Fpga Design Engineer Asic Hybrid Sunnyvale

We are looking for an FPGA Design Engineer for a global aerospace company. In this role, you will be responsible for ASIC & FPGA development on an R&D program.

This 4-day 10-hour shifts per week) role, this is a hybrid role in Sunnyvale, CA or King of Prussia, PA or Denver, CO.

• Work with low SWaP, radiation-hardened, space-rated devices.
• Develop RTL/VHDL code, scripts, and other items required for the development of FPGAs, complete design and development, and provide self-test designer-level testbench.
• Collaborate with the LM engineering team to debug or simulate Circuitware with Xilinx development tools, deliver FPGA RTL source code changes, and test data and documentation as needed.
• Work with systems engineers and design engineers to develop concepts of operations, and design requirements and assist verification engineers in the verification of FPGA designs.
• Attend team meetings and reviews as needed. Complete or contribute to the design documentation in accordance with the client's processes, All data and drawings must remain exclusively on the client's internal networks or computing resources and be protected according to guidance or training provided by the client.

Requirements:

• 9+ years of experience in the design of FPGA and/or ASIC devices.
• Experience with HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
• Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
• Experience in in scripting such as Perl, TCL, and Python.
• Experience in developing test cases based on given requirements.
• Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
• Knowledge of space-grade/qualified FPGAs and ASICs.
• US Citizenship is required.
• Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.

Please submit your resume to our network at (Please apply to the FPGA Design Engineer ASIC (Hybrid Sunnyvale, CA or King of Prussia, PA or Denver, CO) role.

Please feel free to forward this opportunity to others who may be interested.

Stage 4 Solutions is an equal-opportunity employer. We celebrate diversity and are committed to providing employees with an inclusive environment that is free of discrimination and harassment. All employment decisions are based on the job requirements and candidates' qualifications, without regard to race, color, religion/belief, national origin, gender identity, age, disability, marital status, genetic information or other applicable legally protected characteristics.

Compensation: $89.00/hr - $110.00/hr

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