Sr. Physical Design Engineer
San Jose
Overview:
Prodapt ASIC services (formerly Innovative Logic) is the leading provider of SoC ASIC/FPGA and Embedded Software services.
Our business model is to offer our services based on turnkey, Offshore design center (ODC) or staff augmentation.
Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation, DFT, RTL2GDSII, Physical Design using ICC2 and Innovus, Mask Layout, Firmware, Silicon Bringup. Analog mask layout. Embedded services: device drivers, RTOS porting, Board bring up.
Prodapt is looking for a Senior Physical Design Engineer who has recent experience working on the latest 3-5nm node Finfet.
Responsibilities:
- Physical design engineer with recent experience working on physical design from netlist to gdsii
- Must have used Cadence tools in the recent projects for physical design as well as sign off tools such as Caliber and PrimeTime
- Must have recent experience in TSMC 3nm-5nm or the latest Intel node
- Must have worked on complex SoCs at block or top level
- Must be proficient in scripting using python/tcl etc.
Requirements:
- Bachelor's or higher degree in Electrical Engineering, Computer Science, or a related field.
- 8+ years or relevant work experience
- Proven experience in Cadence Innovus tools in the recent projects for physical design as well as sign off tools such as Caliber and PrimeTime
- Proficiency in scripting
- languages, such as Perl, Python
- Strong problem-solving skills.
- Excellent communication and teamwork abilities.
- Highly adaptable and able to work in a fast-paced, collaborative environment.
San Jose
services: device drivers, RTOS porting, Board bring up.
Prodapt is looking for a Senior Physical Design Engineer who has recent experience working on complex SoCs using Floorplan, P&R and Must have recent experience in GlobalFoundries 12nm/ 12LP+
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