Physical Design Jobs in California
1 - 15 of 57
Search Results - Physical Design Jobs in California
Synapse Design Inc.-Santa Clara
Physical Design Engineer
Santa Clara CA, Fort Collins CO, Richmond Virginia
Qualification Required:
Typically requires minimum of 7-20 years of experience in Physical Design with mainstream P&R tools
Bachelors OR Master’s Degree Engineering...
mindmatch.ai -
Calsoft Labs-Santa Clara
Job Description:
Responsible for doing all aspects of SOC Physical Design implementation. For this position, the candidate will be representing Synopsys under our Design Services organization working on physical design implementation for SOC...
resume-library.com -
Acceler8 Talent-Mountain View (CA)
Physical Design Engineer
Join a pioneering startup as they build the compute platform for AGI! This innovative company creates vertically integrated solutions from silicon to systems, tailored for massive ML workloads. They seek silicon physical...
mindmatch.ai -
San Jose
Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation, DFT, RTL2GDSII, Physical Design using ICC2 and Innovus, Mask Layout, Firmware, Silicon Bringup. Analog mask layout. Embedded services: device...
icims.com -
Acceler8 Talent-Mountain View (CA)
They are currently seeking silicon physical design engineers to contribute to the development of high-performance, sustainable GenAI silicon.
Ideal candidates will play a crucial role in delivering efficient, functionally accurate silicon solutions for compute...
mindmatch.ai -
ProMedia-San Diego
signal transistor level circuit designs along with the physical layouts of the high speed circuits for high-speed, low-power PHY SerDes blocks.
Minimum Qualifications:
Master's Degree plus 3-15 years of analog design experience - or - PhD with analog...
jobvertise.com -
P. Chappel Associates, Inc.-Santa Clara
Physical Design Engineer – Santa Clara, California
Permanent position – $120K-$160K base salary
Unique opportunity to join an established international company in their North America expansion. Working from the NA headquarters, you will have...
appcast.io -
Unreal Gigs-San Jose
into gate-level netlists using synthesis tools such as Synopsys Design Compiler or Cadence Genus, and perform place-and-route using physical design tools to generate layout.
Physical Design Support: Work closely with physical design engineers to provide...
resume-library.com -
Eliyan-San Francisco
and review with key staff
3. Write RTL that meets specs
4. Work with the physical design team to ensure best-in-class PPA
5. Work with the verification team to create a verification plan, review assertions and checkers, stimulus, and coverage metrics
6. ..
appcast.io -
Wipro-Sunnyvale
Physical Design Engineer
Minimum Qualifications
• Experience in power delivery, power grid design and signoff
• Experience with power delivery networks, including on-die power gating and in-rush current profiles
• Understanding of RTL2GDS flow...
mindmatch.ai -
Calsoft Labs-San Jose
and enabling our design teams for execution.
The candidate needs to:
Circuit Design experience for std cells and memories
Work with arch, design & physical design teams to determine customizations for all foundation IP that are product differentiators...
resume-library.com -
L&T Technology Services-Sunnyvale
technology nodes.
• Hands-on experience with block level physical design (Floorplanning to GDSII).
• Experience with SoC level integration (multiple blocks, SoC floorplan, clocking, and timing analysis) preferred.
• Expertise in Cadence (Innovus) P&R...
mindmatch.ai -
Flexton, Inc.-San Francisco
non-functional requirements.
4. Own the core development team and deliverables: technical architecture, logical and physical design of the solution, coding, testing, and debugging.
5. Own the relationships with the business users / Program Management...
appcast.io -
San Jose
augmentation.
• Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation, DFT, RTL2GDSII, Physical Design using ICC2 and Innovus, Mask Layout, Firmware, Silicon Bringup. Analog mask layout. Embedded...
icims.com -
Eliyan-San Francisco
with key staff
3. Write RTL that meets specs
4. Work with Verification team to root cause and fix bugs
5. Work with the physical design team to ensure best-in-class PPA
6. Work with the verification team to create and review assertions and checkers...
appcast.io -
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